Review

Extremely well organized, the book is logically divided into chapters that address particular aspects of design verification; allowing the reader to quickly find the correct starting point for their desired 'lifeline' to a verification expert. Furthermore, throughout the book, the text includes executive summaries on the left side of each page, which lets the reader quickly scan the pages and focus on the sections that interest them.

The author's pearls of wisdom extend beyond the limitation suggested by the title: the book also discusses many of the verification tools a testbench writer would use, such as linters, simulators, coverage tools and waveform viewers; and also tools for revision control, bug tracking and verification metrics.

The book is replete with examples in both VHDL and Verilog, which clearly indicate the ideas the author is trying to express, or the pitfalls he is warning the reader away from.

Viewed from another direction, this book is a fairly eloquent description of the state of the design world which prompted my company's formation and the design and development of our verification tool suite, including testbench automation, white box testing and code coverage and lint tools. The author eludicates the benefits of the coverage and linting tools, while challenging us to deliver on the white-box products.

By spending 350+ pages in conveying to the reader how to build effective testbenches, the book implicitly conveys the value of verification languages and more automated solutions, such as those found in Specman Elite. By clearly describing the strengths and weaknesses of todays HDLs as testbench languages and the manual nature of today's approaches, the stage is also set for evaluating the quality of commercially available verification languages and tools.

In summary, this book is a must have for every design verification person. And, as many designers also wear the verification hat from time to time, they should also pick up a copy. There isn't another book like this: it fills a big hole on the shelf of the modern hardware verification engineer.